A Guide to Analog ASICsA Guide to Analog ASICs is a working reference for the engineer who regularly uses analog custom technology or plans to use it in a product. The book includes a detailed analysis of analog and digital application specific integrated circuits (ASICs), the vendor selection process, cost trade-offs, and design-options (in-house, design center, use of vendor design resources). After introducing the development of analog ASICs, ASIC vendors, development cycles, and cost considerations, the text reviews basic global semiconductor technology, IC fabrication techniques, and the limitations of linear IC design. The components found inside the chip are integrated resistors, capacitors, transistors, diodes, and metal connections. The text explains building block circuits, how these are used to construct complex circuitry, and how the Simulation Program with Integrated Circuit Emphasis (SPICE) can check for circuit performance. The selection of the chip's package is important and depends on several factors, such as thermal size, physical size, PC board technology, number of pins, die size. When tested, a typical product should have a failure rate that follows a curve composed of a failure rate (X-axis) versus time (Y-axis). The book also provides suggestions on vendor selections including vendor identification, site visitation, and price negotiations. The book is suitable for computer engineers, designers of industrial processes, and researchers involved in electrical, computer, or other devices using integrated circuits. |
Contents
| 1 | |
| 13 | |
Chapter 3 Integrated Circuit Components | 33 |
Chapter 4 SPICE Simulation | 73 |
Chapter 5 Circuit Design | 129 |
Chapter 6 Integrated Circuit Layout Considerations | 269 |
Common terms and phrases
amplifier analog ASIC arrays ASIC ASIC vendor base current beta bias bipolar buried layer C₁ calculated capacitance capacitor chip circuit design circuitry collector components cost current flows current mirror current source data fields Default value definition statement devices die attach diffusion diode dopants doped electrons emitter epi island fields describe frequency geometries I₁ inductor initial input integrated circuit JFET key letter lateral pnp LATPNP layout linear metal node numbers NODE VOLTAGE noise nonlinear op amp OPERATIONAL AMPLIFIER optional oscillator output impedance p-type package parameters PC board performance pn junction pnp transistors potential Q₁ Q₂ R₁ R₂ reference resistor semiconductor semicustom SGNPN sheet resistivity signal silicon slew rate specified SPICE statement must begin subcircuit substrate thermal resistance tion transient analysis typical V+ ww Vladimirescu voltage source Vout Vref wafer waveform ww RL ww ww ΚΩ