Computer Organization |
Contents
Basic Structure of Computer Hardware | 1 |
Basic Operational Concepts | 9 |
1 | 16 |
Copyright | |
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adder addressing modes arithmetic array assembly language Assume autoincrement binary bit position block branch instruction buffer byte cache called Chapter character chip circuit clock condition code connected consider contents control signals counter CPU registers cycle data transfer decimal decoder delay destination digits discussed disk EEEE effective address encoded example execution fetch flag flip-flop floating-point format function gates hardware I/O device implementation index register input instruction set integer interface interrupt request interrupt-service routine loaded logic loop machine instruction main memory mantissa memory access microinstruction microprocessor microprogram modules multiplexer multiplier needed Nubus OP code OP-code operand operation output parameters performed pointer processor program counter R₁ result RISC scheme Section sequence shown in Figure specified stack status register storage stored subroutine subtraction switch synchronous transmission transmitted truth table variables word