Dynamic Reconfiguration: Architectures and AlgorithmsDynamic Reconfiguration: Architectures and Algorithms offers a comprehensive treatment of dynamically reconfigurable computer architectures and algorithms for them. The coverage is broad starting from fundamental algorithmic techniques, ranging across algorithms for a wide array of problems and applications, to simulations between models. The presentation employs a single reconfigurable model (the reconfigurable mesh) for most algorithms, to enable the reader to distill key ideas without the cumbersome details of a myriad of models. In addition to algorithms, the book discusses topics that provide a better understanding of dynamic reconfiguration such as scalability and computational power, and more recent advances such as optical models, run-time reconfiguration (on FPGA and related platforms), and implementing dynamic reconfiguration. The book, featuring many examples and a large set of exercises, is an excellent textbook or reference for a graduate course. It is also a useful reference to researchers and system developers in the area. |
Contents
PRINCIPLES AND ISSUES | 3 |
Bibliographic Notes | 14 |
A PRIMER | 17 |
Algorithms | 92 |
ARITHMETIC ON THE RMESH | 115 |
Addition | 123 |
Problems | 146 |
SORTING AND SELECTION | 153 |
RUNTIME RECONFIGURATION | 417 |
13 | 436 |
17 | 443 |
22 | 456 |
Problems | 461 |
References | 471 |
153 | 472 |
Problems | 476 |
GRAPH ALGORITHMS 179 | 178 |
COMPUTATIONAL GEOMETRY IMAGE PROCESSING | 231 |
MODEL AND ALGORITHMIC SCALABILITY | 277 |
COMPUTATIONAL COMPLEXITY | 312 |
OPTICAL RECONFIGURABLE MODELS 357 | 355 |
154 | 482 |
| 499 | |
| 500 | |
Other editions - View all
Dynamic Reconfiguration: Architectures and Algorithms Ramachandran Vaidyanathan,Jerry Trahan Limited preview - 2007 |
Dynamic Reconfiguration: Architectures and Algorithms Ramachandran Vaidyanathan,Jerry Trahan No preview available - 2004 |
Dynamic Reconfiguration: Architectures and Algorithms Ramachandran Vaidyanathan,Jerry Trahan No preview available - 2013 |
Common terms and phrases
algorithm of Section algorithm of Theorem APPBS array binary prefix binary tree block broadcast bus delay buses Chapter circuit column compute concurrent write conditional delay connected components convex hull corresponding CRCW CRCW R-Mesh determine directed graph dynamic reconfiguration edge Euler tour F-RMBM Figure FPGA fuse h-slice HVR-Mesh IEEE implementation inorder input bits integer iteration Lemma Let denote linear list ranking matrix multiplication minimum spanning tree multiple addition neighbor localization number of processors one-dimensional R-Mesh optimal Parallel and Distributed perform permutation routing Pipelined points PRAM prefix sums preorder preorder-inorder PRIORITY problem Proc processor holds processor LARPBS pulse quadtree R-Mesh algorithm R-Mesh in O(1 Reconfigurable Architectures Reconfigurable Computing Reconfigurable Mesh reconfigurable models recursion result RMBM row-major order runs in constant scaling simulation segment switches segmentable bus sequence slice sorting algorithm sub-R-Mesh subset technique three-dimensional R-Mesh tion Trahan traversal two-dimensional R-Mesh upper hull vertex vertices