Low Power, Compact Charge Coupled Device Signal Processing SystemNational Aeronautics and Space Administration, Scientific and Technical Information Office, 1980 - Charge coupled devices - 184 pages |
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Common terms and phrases
32-Point CCD CZT accuracy address lines algorithm analog input analog/analog correlator attenuation Binary/Analog Correlator Block Diagram capacitive coupling capacitor CCD filters CCD input CCD1 CCD2 channel chip clock cycle compensation capacitors Convolution CZT ICs DCI amplifier DCI Sample device Differential Amplifier digital word discrete Fourier transform driver Dual MDACs Duty Cycle electrodes External Sync Pulse feedback linearized Figure 52 flip-flop floating gate illustrated in Figure impulse response Input Amplifier input sample-and-hold input signal input stage Internal ROM Inverting Output IP/G MDAC MDAC Output MOSFET multiplier FETs nonlinearity Offset Error Outputs operation operational amplifiers output buffer output node output voltage performing Phase photograph photomask polysilicon programmable correlation reset ROM Sense Sense and MDAC shift register shown in Figure signal charge significant bit split electrodes synchronization transfer transistors Triangle Waves Up/Down Counter V/div V₂ waveform weighting coefficients z-transform