Micro, Volume 17IEEE Computer Society Press, 1984 - Computer architecture |
Contents
Mapping HLL Constructs into Microcode for Improved Execution Speed | 2 |
A Microcoded Multiprocessor Crossbar Network Communications Controller | 12 |
An Academic Exercise in Computer Design Using Microprogramming | 21 |
Copyright | |
30 other sections not shown
Common terms and phrases
abstract algorithm allocation architecture ARDA bits branch buffer byte chip choice point clause clock command compaction compiler COMPLEX_NUMBER components Computer control store cycle data types datapath decode delta environment example execution fetch field Figure firmware flow graph function Gate Delays global hardware Horn clause host machine i j k IEEE implementation input instruction set integer interface ISPS language loaded logic Logic Programming loop mapping MASCO memory micro microarchitecture microassembler microcode microcycle microinstruction microoperations microprogram microsequencing microword migration module nanoprogram node Number of Gate opcode operand operation optimization output parallel parameters performance pipeline pointer port postcondition Prefetch problem procedure processor program counter Prolog register allocation result routine SDVS selected sequence signal simulation specified stack structure subgoals symbolic target machine tion trace scheduling UNIBUS variables verification VLSI VAX