Schaum's Outline of Computer Architecture (Google eBook)
2 pages matching RISC "fewer instructions" in this book
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Data Representations and Computer Arithmetic 16
Computer Organization 45
9 other sections not shown
ADD rl address space address translation addressing modes allow amount bandwidth binary bit cell branch instruction bubblel bytes cache line chapter CISC compiler contains copy DRAM encoding Entry Tag Entry example execution units fetch floating-point floating-point numbers GPR architectures hard disk hardware hit rate I/O bus I/O devices implement improve performance increases input instruction set instruction-level parallelism integer interrupt issue iterations latency loop main memory mantissas memory hierarchy memory operations memory reference memory system multiple multiprocessor number of bits number of instructions operands operating system output page table percent physical address pipeline latch pipeline stages processor referenced register file register renaming request result RISC sequence set-associative sign bit sign-magnitude Solution speedup SRAM stack stack-based architectures storage stored superscalar superscalar processor tag array Tag Entry Tag takes track unrolling virtual address virtual memory Virtual Page VLIW write write-back