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Verifying Estelle protocol specifications using numerical Petri nets
R Lai and A Jirachiefpattana 15
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AHPL algorithm allocation application architecture array assignment bandwidth bisection block bubble sort buffer CBR cell cell loss child process communication concurrency congestion connected database delay detection distributed dynamic Estelle example execution failure fault fault injection fault-tolerant Figure frame function global graph hardware hypercomputer hypercube IEEE implementation input interaction point interconnection load balancing memory MEMSY module instance MPEG multicast multiplexer multiprocessor node object operation optimal overhead paper Parallel Computing parameters partitioning performance Petri Nets problem Proc processor protocol queue queueing delay ramdisk reconfiguration reduced reference request RM cells router routing run-time scheduling scheme sequence SHDS signature simulation SLIN specification speedup stack star graph statement strategy stream structure submesh task throughput tion token traffic transfer tree users validation variable VLSI