Network-Based Parallel Computing Communication, Architecture, and Applications: Third International Workshop, CANPC'99, Orlando, Florida, USA, January 9th, 1999, Proceedings, Volume 3 (Google eBook)
Anand Sivasubramaniam, Mario Lauria
Springer Science & Business Media, May 5, 1999 - Computers - 224 pages
Clusters of workstations/PCs connected by o?-the-shelf networks have become popular as a platform for cost-e?ective parallel computing. Hardware and so- ware technological advances have made this network-based parallel computing platform feasible. A large number of research groups from academia and industry are working to enhance the capabilities of such a platform, thereby improving its cost-e?ectiveness and usability. These developments are facilitating the mig- tion of many existing applications as well as the development of new applications on this platform. Continuing in the tradition of the two previously successful workshops, this 3rd Workshop on Communication, Architecture and Applications for Netwo- based Parallel Computing (CANPC’99) has brought together researchers and practitioners working in architecture, system software, applications and perf- mance evaluation to discuss state-of-the-art solutions for network-based parallel computing systems. This workshop has become an excellent forum for timely dissemination of ideas and healthy interaction on topics at the cutting edge in cluster computing technology. Each submitted paper underwent a rigorous review process, and was assigned to at least 3 reviewers, including at least 2 program committee members. Each paper received at least 2 reviews, most received 3 and some even had 4 reviews.
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The NIP Parallel ObjectOriented Computational Model
achieved adaptive routing address space Aleph appbt application Architecture bandwidth break node buﬀer Bufx bytes cache checkpoint communication connection credits deadlock deﬁned delay descriptor diﬀerent Distributed Computing Distributed Shared Memory eﬀective eﬃcient ELFM code execution ﬁre ﬁrst ﬂag ﬂexibility ﬂit cycles ﬂow control FPGA function graph hardware header HTMT Hybrid Router IEEE implementation interconnection irregular networks Java latency Load Balancer message latency message length message passing MSRPC multicast multiple Myrinet network interface network-aware Networks of Workstations NIPDSM object overhead packet parallel computing parallel ELFM parallel programming parameters pipelined processors protocol provides queue receive reconfiguration reﬁll reﬂective memory rollback root node router routing algorithm routing scheme routing tables Section sender sequence server shared memory simulation speciﬁc speedup SRAM stream sockets super-pipelined switch synchronization task tasklet thread throughput up∗/down update user-level virtual channels virtual memory workstations