Cost-effective Processor Design with an Application to Fast Fourier Transform Computers

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Department of Electrical Engineering, Stanford University., 1973 - Computer engineering - 334 pages
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A cost-effective processor design is one that attains a high ratio of processing performance to processor component cost. This research investigates the circuit design of a processor or processing subsystems for costeffective implementation of a particular computation algorithm. The logic designs considered in this work use circuit components for which the delay and cost of functional building blocks or gates are known. A logic design technique is described that permits processing performance and cost comparisons among alternative computation algorithms and circuit technologies. It also provides a basis for contrasting alternative processor architectures, including both pipelined and parallel computing structures. (Modified author abstract).

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Contents

COSTEFFECTIVE PROCESSOR DESIGN
13
COSTEFFECTIVE DESIGN OF FAST FOURIER TRANSFORM
49
FFT Algorithm
59

7 other sections not shown

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