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A DIRECT DIGITAL LOGIC SIMULATION
A SIMPLE PROGRAM
11 other sections not shown
7411 AND gates ACCUMULATOR CONTENTS address bus ASCll CODE assembly language BASE ADDRESS binary digit buffer CH RDY clock signal COMPLEMENT CPU registers DATA MEMORY DECREMENT DELAY LOOP device digital logic extemal logic flip-flop FFC HAMMER PULSE illustrated as follows initial INPUT I/O PORT input signal instruction is executed instruction loop instruction sequence interrupt interrupt request INVD INX H ISOLATE BIT label LOAD I/O PORT memory address memory byte microcomputer program microcomputer system microseconds monostable multivibrator ob|ect code one-shot OUTPUT RESULT output signals pnnt cycle pnntwheel ppqq PRINT CYCLE PRINTHAMMER FIRING Program Counter PW REL PW STROBE Q output represents RESET BIT RESTORE RESULT retum RETURN STROBE SET BIT SET OF INPUTS signal inverter source program Stack Pointer struction SUBR subroutine SUBTRACT SWITCHING TABLE BASE ADDRESS TEST three instructions tngger Zero status