Computer System Design: System-on-Chip (Google eBook)
The next generation of computer system designers will be less concerned about details of processors and memories, and more concerned about the elements of a system tailored to particular applications. These designers will have a fundamental knowledge of processors and other elements in the system, but the success of their design will depend on the skills in making system-level tradeoffs that optimize the cost, performance and other attributes to meet application requirements. This book provides a new treatment of computer system design, particularly for System-on-Chip (SOC), which addresses the issues mentioned above. It begins with a global introduction, from the high-level view to the lowest common denominator (the chip itself), then moves on to the three main building blocks of an SOC (processor, memory, and interconnect). Next is an overview of what makes SOC unique (its customization ability and the applications that drive it). The final chapter presents future challenges for system design and SOC possibilities.
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AMBA application approach architecture array ASIC ASOC bandwidth basic bits blocks branch branch prediction buffer buses bytes cache miss CBWA Chapter chip clock complex components computation configuration core cost crossbar crossbar switch custom instructions cycle DDR SDRAM decoder delay device DRAM dynamic eDRAM example execution fabric floating-point FPGA functional units hardware I-cache implementation input instruction processors instruction set integrated interconnect interface L1 cache latency logic macroblock memory system miss rate module motion estimation multiple nodes off-die on-chip on-die operands operations optimization output overhead performance pipelined processor pixel power consumption prediction processor design reconfigurable register file request requirements result run-time self-optimization shown in Figure signal SIMD SOC design specific SRAM static storage superscalar switch synchronization system design Table target techniques tion trade-offs transistors typical vector processor virtual address VLIW Xilinx