Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction (Google eBook)
Sandeep Kumar Shukla, Jean-Pierre Talpin
Springer Science & Business Media, Aug 5, 2010 - Technology & Engineering - 266 pages
Embedded software is ubiquitous today. There are millions of lines of embedded code in smart phones, and even more in systems responsible for automotive control, avionics control, weapons control and space missions. Some of these are safety-critical systems whose correctness, timely response, and reliability are of paramount importance. These requirement pose new challenges to system designers. This necessitates that a proper design science, based on "constructive correctness" be developed. Correct-by-construction design and synthesis of embedded software is done in a way so that post-development verification is minimized, and correct operation of embedded systems is maximized. This book presents the state of the art in the design of safety-critical, embedded software. It introduced readers to three major approaches to specification driven, embedded software synthesis/construction: synchronous programming based approaches, models of computation based approaches, and an approach based on concurrent programming with a co-design focused language. It is an invaluable reference for practitioners and researchers concerned with improving the product development life-cycle.
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Formal Modeling of Embedded Systems with Explicit Schedules and Routes
Synoptic A DomainSpecific Modeling Language for Space Onboard Application Software
A Module Language for Typing SIGNAL Programsby Contracts
AADL abstraction actor algebra algorithm analysis applications architecture automaton behavior block Boolean equations buffer CCSL channel circuits clock constraints clusters communication compilation component computation concurrent contract cycle dataflow deadlock defined definition denoted dependency deterministic domain East-ADL Embedded Software embedded systems endochronous environment epoch equations Esterel event example execution condition FirstDegree flow function formal formal verification function global goto Guernic hardware IEEE implementation input and output input port INRIA instant interface Kalman filter latency LTTA Marked Graphs MARTE master trigger middleware MoCCs module MRICDF model operations optimization output port polychronous process-filters processors properties real-time reconfiguration refinement represent requirements satellite Sect semantics sequence sequential SHIM SIGNAL process SIGNAL program Simulink Sophia Antipolis specification Springer Science+Business Media static schedule synchronous programming language SynDEx Synoptic synthesis Talpin task techniques throughput tion token transformations variables x_st