80C186EB/80C188EB User's Manual |
Contents
BUS INTERFACE UNIT | 3-1 |
CLOCK GENERATOR | 41 |
PERIPHERAL CONTROL BLOCK | 51 |
13 other sections not shown
Other editions - View all
Common terms and phrases
80C186 Modular Core active baud rate buffer bus cycle Bus Interface Unit bus master byte or word chip select CLKIN CLKOUT control register Core family processor counter CPU clock crystal oscillator data bus data frame device ENable bit external READY fetch flag HLDA I/O space Idle Mode index register input pin integrated Interrupt Controller integrated peripheral internal Interrupt Controller interrupt request interrupt vector logic MAX COUNT maximum count register microprocessor MOD REG R/M Modular Core family mov dx mov mov multiplexed Non-Maskable Interrupt opcode operand operation oscillator parity peripheral control block pointer port pin priority R/M DISP-LO),(DISP-HI R/M MOD refresh cycles segment registers Serial Communications Serial Communications Unit signal single step stack status status register STOP ADDRESS string instructions synchronized T-state TBUF timer control register transfer transmission transmit TX Machine UNDEFINED WHEN READ wait WRITE zero