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Historic Progress in Architectures
MICROOPERATION HARDWARE DIAGRAMS
31 other sections not shown
adder ALAP algorithm allocation analysis application assigned cells circuit clock period complex components computer system computing modules concurrent concurrent computers connecting elements contains control unit cycle data access data words DC-group delay detection diagnosable digraph dynamic architecture edge error Example execution fault condition fault-free Fault-Tolerant Computing fault-tolerant systems faulty modules fetch FIGURE functions graceful degradation graph hardware resources IEEE Trans implemented input instruction sequence interconnection International iterations Kartashev log2 logic loop LSI modules memory element micro microinstruction microoperations microprogram minimal modular computer multicomputer multiprocessor node opcode operands operation output parallel array parallel systems partitioning path performed phase pins pipeline predicate primary memory problem processing processor Program Loop pulse train reconfiguration redundancy reliability requirements sequential signal STARAN stored structural termination submatrix Supersystem switch techniques throughput transfer triple modular redundancy types V-graph V-matrix variable