SPIN Model Checking and Software Verification: 7th International SPIN Workshop Stanford, CA, USA, August 30 - September 1, 2000 Proceedings (Google eBook)

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Klaus Havelund, John Penix, Willem Visser
Springer Science & Business Media, Aug 21, 2000 - Computers - 342 pages
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The SPIN workshop is a forum for researchers interested in the subject of automata-based, explicit-state model checking technologies for the analysis and veri?cation of asynchronous concurrent and distributed systems. The SPIN - del checker (http://netlib.bell-labs.com/netlib/spin/whatispin.html), developed by Gerard Holzmann, is one of the best known systems of this kind, and has attracted a large user community. This can likely be attributed to its e?cient state exploration algorithms. The fact that SPINís modeling language, Promela, resembles a programming language has probably also contributed to its success. Traditionally, the SPIN workshops present papers on extensions and uses of SPIN. As an experiment, this yearís workshop was broadened to have a slightly wider focus than previous workshops in that papers on software veri?cation were encouraged. Consequently, a small collection of papers describe attempts to analyze and verify programs written in conventional programming languages. Solutions include translations from source code to Promela, as well as specially designed model checkers that accept source code. We believe that this is an - teresting research direction for the formal methods community, and that it will result in a new set of challenges and solutions. Of course, abstraction becomes the key solution to deal with very large state spaces. However, we also see - tential for integrating model checking with techniques such as static program analysis and testing. Papers on these issues have therefore been included in the proceedings.
  

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Contents

Papers
1
Using Garbage Collection in Model Checking
20
Model Checking Based on Simultaneous Reachability Analysis
34
Testing SPINS LTL Formula Conversion into Biichi Automata with
54
Verification and Optimization of a PLC Control Schedule
73
A Symbolic Model Checker for Boolean Programs
113
Logic Verification of ANSIC Code with SPIN
131
Interaction Abstraction for Compositional Finite State Systems
148
Linking STeP with SPIN
181
A Language Framework for Expressing Checkable Properties of Dynamic
205
ModelChecking Multithreaded Distributed Java Programs
224
Using Runtime Analysis to Guide Model Checking of Java Programs
245
Communication Topology Analysis for Concurrent Programs
265
LowFat Recipes for SPIN
287
Tool Tutorials
322
Author Index
343

Towards Verification in Hierarchical System
163

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Page 1 - 1 Dept. of Computing Sci., Eindhoven University of Technology PO Box 513, 5600 MB Eindhoven, The Netherlands 2 Dept. of Electrical Eng., Eindhoven University of Technology
Page 1 - 2 Dept. of Electrical Eng., Eindhoven University of Technology PO Box 513, 5600 MB Eindhoven, The Netherlands {D. Bosnacki, D. Dams, L.

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