IEEE Standard[s], Issue 1754
IEEE Computer Society. Microprocessor and Microcomputer Standards Committee, Institute of Electrical and Electronics Engineers, IEEE Standards Board
Institute of Electrical and Electronics Engineers, 1994
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address space aexc alternate space ancillary state register Annex annul bit assembly language syntax big-endian byte cache cexc conditional branch context control transfer control-transfer instruction coprocessor DCTI deferred trap deferred-trap queue delay instruction division_by_zero divisor doubleword error error_state executed FBfcc field floating-point trap format fp_exception trap FPop fregrd halfword hardware IEEE STANDARD IEEE Std IEEE_754_exception impl implementation dependencies implementation-dependent integer condition codes interrupt request JMPL least significant least significant bit load load/store instruction MICROPROCESSOR ARCHITECTURE Std modify cc's o4 mulscc o4 occurs Opcode operand overflow page table processor program counter r[rd r[rsl rd op3 rs1 Reference MMU reg_or_imm register window regrsl result self-modifying code status register STDFQ STFSR Suggested assembly language supervisor mode supervisor software texc trap type underflow unsigned integer unused zero WRASR