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Ordering lnformation and Package Outlines
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3-State Outputs 50 pF Units 54AC 74AC Symbol active LOW adjacent to Lead alumina Arrow Electronics Avenue California CMOS Controlling dimensions copper alloy dimensions are inch dimensions are typical Drive Fairchild Semiconductor Flip-Flop followed by inch H H H H L H Hall-Mark Electronics Hamilton/Avnet Electronics identification mark inch dimensions JEDEC Latch Lead One identification Leads are copper lnput located adjacent logic logic families material is novolac Metric dimensions appear misalignment to facilitate notch or Lead Notes lndex area novolac epoxy ns Propagation Octal Buffer/Line Driver Ordering Code Output Enable Overland Park Package plastic material Package weight Pin Assignment plated or solder PLCC positive misalignment Power Dissipation Capacitance Propagation Delay Quad 2-lnput Road Schweber Electronics shaded area shown shipped with positive solder coated South Salt Lake Suite Symbol Parameter Vcc tin plated Truth Table Typ Guaranteed Maximum typical unless otherwise Units Propagation unless otherwise specified Voltage Wyle Distribution Group