Solid State Pulse Circuits |
Contents
CAPACITIVE RESISTIVE CR CIRCUITS | 28 |
Chapter 3 | 37 |
DIODE SWITCHING | 57 |
Copyright | |
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amplitude applied base voltage base-emitter bias biased binary bistable multivibrator block diagram C₁ C₂ capacitor capacitor voltage cathode charging current collector current collector voltage collector-coupled D₁ D₂ data sheet decade counter decimal count Design device diode discharge display emitter flip-flop forward-biased frequency hFE(min input pulse input terminal input voltage integrated circuit JEDEC JFET liquid crystal mAdc maximum modulation monostable monostable multivibrator MOSFET NAND gate negative negative-going operational amplifier output pulse output voltage output waveform pnp transistor positive pulse width Q₁ Q₂ R₁ R₂ ramp relaxation oscillator reset resistance resistor reverse reverse-biased ring counter sampling gate saturation Schmitt trigger seven-segment shown in Figure Sketch the circuit square wave standard value supply voltage switch transistor V₁ VCE(sat voltage drop voltage level waveforms Zener diode zero ΚΩ μΑ