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address correlation table application branch prediction buffers and victim cache line cache line index cache miss Cmp Esp Lin Compress configuration define dynamically scheduled processor effective entry prediction cache Esp Lin Sc Espresso excess CPI FFT Unc Wav floating point functional units impact of memory implemented increase indirect branch instruction fetch instruction window integer issue L2 Cache latency tolerance Lin Sc Spc Linpacks Lisp load address load instruction lookahead Lsp Benchmark Figure memory bandwidth memory subsystem microprocessor miss history miss penalty miss rate MXS simulator operations parameters partial hits physical register prediction cache prefetch amount prefetching processor model register alias table register file register renaming reservation stations save ratio Sc Spc FFT Spc FFT Unc speculative execution Spice stream buffers superscalar processor techniques for tolerating tolerating memory latency tomcatv Unc Wav Lsp Uncompress updated vector processors victim cache Wav Lsp Benchmark Xlisp