Computer hardware description languages and their applications: proceedings of the IFIP WG 10.2 Eighth International Conference on Computer Hardware Description Languages and Their Applications, Amsterdam, the Netherlands, 27-29 April, 1987
North-Holland, 1987 - Computers - 405 pages
The symposium on which this book is based has become established as the focal point for the meeting of experts in the field of formal descriptions of hardware and their use in analysis and synthesis of digital systems. The papers reflect the gradual shift from the original emphasis on the uses of language design to describe hardware, toward more formal techniques for specification and verification.
26 pages matching programming language in this book
Results 1-3 of 26
What people are saying - Write a review
We haven't found any reviews in the usual places.
Hardware Description and Simulation Using Concurrent Prolog
Programspecific and Architecturespecific Simulators
24 other sections not shown
Other editions - View all
abstraction level activation agency algorithm analysis approach arbiter architecture assembly language Barbacci behavior block cell CHDL circuit clock Computer Hardware Description Concurrent Prolog constraints coroutine cycle DACAPO declaration defined definition delay described Design Automation Design Automation Conference digital systems EDIF elements evaluation event example execution extraction fault coverage Figure First-Order Predicate Calculus formal verification functional fault gate Hardware Description Languages hierarchical I-fault IEEE IFIP implementation input instruction cycle interconnection interface internal ISPS simulator layout LOGLAN matrix mechanism messages microcode microoperation microprogram module NCND netlist node operand operations output parallel pass transistor performance port Proc procedure processor program-specific simulators programming language Prolog protocol register transfer register transfer level semantics sequence signal specification stbl stbl stbl structure synchronization techniques Temporal Logic transition valid variables vector VHDL VLSI Warp wiring