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address register Bank switching bit content byte carry/link chip number chip select Circuit circuitry clock signals CLR/LD CM-ROM command register contents of index contents of register data bus decoded device digit display ENABLE example execution fetched Figure flip-flop I/O lines I/O ports incremented index register pair input ports instruction cycle Intel interface internal bus interrupt routine keyboard lnputs lNSTRUCTlON loaded logic main memory character microcomputer Mnemonic mode Module multiplexed OATA operation OPR OPA option output buffers previously selected RAM program control program counter program memory provides push down stack RAM chips RAM output port RAM status character REGlSTER RESET ROM address ROM bank ROM's RRR0 RRRR sequence shift register SRC instruction SRC register stack STOP storage stored strobe subroutine supply voltage switch Symbolic SYNC tion transferred unaffected