Proceedings: 27th Annual Simulation Symposium, April 11-15, 1994, La Jolla, California, Volume 27 |
Contents
Parallel Simulation of Heterogeneous Arithmetic Units Networks | 13 |
DelayTime Bounds and Wave form Bounds for RLCG Ladder Networks | 23 |
A Methodology for Evaluating Parallel | 31 |
Copyright | |
26 other sections not shown
Common terms and phrases
algorithm allocation application architecture assigned basic block behavior bids buffer checkpointing circuit communication compiled Computer connected constraints cycle data flow diagrams deadline defined delay described diagram digit DIPART distributed dot product dynamic entity environment equations error rate evaluation event example execution Foresight forward algorithm function graph hard real-time hardware I/O node IEEE implementation input instruction interconnection interface interval iteration load logic logic value machine memory method module MOSFET node object object-oriented operation optimization OSDL OTDD output packet parameters performance ports processor protocol queue real-time redundancy request rollback router scheduling sequence server signal SimTool software components SPARC specific SSGM strategy switch symbolic simulation target program task technique ternary logic time-step timestamp tion tool traffic variable VHDL VLSI voltage workstations XPOSÉ