Plasma Processing XIII: Proceedings of the International SymposiumG. S. Mathad |
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Common terms and phrases
angle applied aspect ratio bias bias power bottom BPSG CD bias chamber charge chemistry clean concentration decreases defects dense density dependence deposition depth determined device dielectric discussed distribution edge effect electron endpoint etch process etch rate experiments field Figure flow fluorocarbon flux function gate higher holes hydrogen improve increase indicates Infineon Technologies intensity layer loss lower magnetic material measured mechanism metal mTorr nitride non-uniformity observed obtained optical optimized oxide oxygen parameters pattern peak performance plasma polymer pressure production range reaction reactor recipe reduced remaining removal resist respectively samples seasoning selectivity shown shows signal silicon simulation SiO2 spacer species step structures substrate surface Technol Technology temperature thermal thickness thin film tool trench uniformity values voltage wafer wall
Popular passages
Page 256 - This study was partially supported by a Grant-in-Aid for Scientific Research from the Ministry of Education, Science, Sports and Culture of Japan, the Research for the Future Program from the Japan Society for Promotion of Science, the Public Participation Program for the Promotion of Info.
Page 210 - The technical material discussed in this paper was accomplished with the support of the German Federal Research and Technology Department from Grant number 01M2992. The responsibility for the technical content and layout of this publication is solely the authors'.
Page 251 - Laboratory for Electronic Intelligent Systems, Research Institute of Electrical Communication, Tohoku University, 2-1-1, Katahira, Aoba-ku, Sendai 980-8577, JAPAN...
Page 57 - Anderson, MP Splichal, JL Mock, P. Bletzinger, A. Garscadden, RA Gottscho, G. Selwyn, M. Dalvie, JE Heidenreich, JW Butterbaugh, ML Brake, ML Passow, J. Pender, A. Lujan, ME Elta, DB Graves, HH Sawin, MJ Kushner, JT Verdeyen, R. Horwath and TR Turner, Rev. Sci. Instrum., 65( 1 ), 1 40 ( 1 994).
Page 80 - BM Armstrong and HS Gamble Northern Ireland Semiconductor Research Centre, Department of Electrical and Electronic Engineering, The Queen's University Belfast BT7 INN, N.
Page 182 - REFERENCES [ 1 ) JF Scott, and CA Paz de Araujo, Science. 246. 1400 (1989) [2] L.
Page 122 - JP Roland. PJ Marcoux, GW Ray. and GH Rankin, J Vac. Sci. Technol. A, 3, 631 (1984).
Page 173 - Memory R&D Division, Hyundai Electronics Industries Co.. Ltd. San 136-1. Ami-ri. Bubal-eub.
Page 169 - In our study, the extent of the plasma charging damage due to the HDP process for IMD deposition were monitored through the transistor performance in terms of the shift in gate leakage, threshold voltage and transconductance from a reference device with no antenna attached. Each of these parameters were measured for a large number of transistors in order to statistically assess the level of plasma based gate oxide damage.
Page 160 - Micron Technology, Inc. 8000 S. Federal Way, PO Box 6 Boise. ID...