Proceedings, the 20th annual International Symposium on Computer Architecture: May 16-19, 1993, San Diego, California
IEEE Computer Society. Technical Committee on Computer Architecture, Sigarch, Institute of Electrical and Electronics Engineers
IEEE Computer Society Press, 1993 - Computers - 361 pages
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Proceedings of the ACM SIGPLAN International Conference on Functional ...
No preview available - 1997
Working Sets Cache Sizes and Node Granularity Issues for LargeScale Multiprocessors
TLBs and Memory Management
Architectural Support for Translation Table Management in Large Address
23 other sections not shown
adaptive protocol algorithm allocation applications average bandwidth benchmarks bits block size branch history Branch Prediction buffer bytes cache coherence cache line cache miss cessor communication compiler Computer Architecture concurrency context switching copy cost cycles data block destage direct-mapped cache disk array DLXe effect entry evaluation execution false sharing Figure floating point global hardware history schemes IEEE implementation improve increase instruction interleaving invalidation J-Machine Kbytes latency load machine mapped mechanisms memory access memory system migratory miss rate MP3D multiple multiprocessor node number of processors operating system overhead page table parallel parity logging pattern history tables performance pipeline prediction prefetching problem programs reduce register file request RISC set-associative cache shared memory shows SIMD simulation single slots speedup synchronization thread throughput TickerTAIP tion TLB miss traces traffic transaction update vector virtual channels window workloads write-invalidate