Fault-tolerant onboard digital information switching and routing for communications satellites
National Aeronautics and Space Administration, Office of Management, Scientific and Technical Information Program, 1993 - Computers - 11 pages
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Aeronautics and Space AIAA autonomous network controller baseband switching architectures BERT mode bit-error-rate tester Broadcast time slot Burst modulator Transmitter Circuit switch Communications Satellites configuration control memory demodulator decoder demonstration subsystem wirewrap demonstration test bed destination address Digital Information Switching downlink beams Download Earth terminals EDAC eight-bit parallel Encoder Burst modulator fault fault-tolerance techniques fault-tolerant memory board fiber optic four input ports four output ports frame of data FTMB hardware input data ISP architecture Lewis Research Center Mary Jo Shalkhauser meshed VSAT satellite microcontroller modulator Transmitter Beam multiplexers NASA on-line RAM Onboard Digital Information packet data packet switching parity bits ping-pong redundant RAM satellite network architecture sink RAM's source RAM's Space Administration space switching Space-division switching spare RAM special test equipment status report subsystem wirewrap bread Switching and Routing switching demonstration test switching is performed switching test bed time-division multiplexed traffic transmitted uplink user terminal VSAT satellite network