Efficiency of compact testing for sequential circuits

Stanford University. Stanford Electronics Laboratories. Digital Systems Laboratory, J. Losq

Defense Technical Information Center, 1976 - 36 pages

Compact testing uses random inputs to test digital circuits. Detection is achieved by comparison between some statistic property of the circuit under test, like the frequency of ones on the output line, and the same property for the fault-free circuit. This paper shows that compact testing can be used efficiently for sequential machines, although it has some inherent limitations. Synchronization is achieved by a long sequence of random inputs whose length is circuit dependent. However, for most sequential circuits, synchronization can be achieved in a few seconds. The great majority of failures inside the memory elements are easily detected even with short tests. Compact testing also detects most of the failures in the combinational parts. There, its efficiency is largely dependent upon the test length and also the characteristics of the random number generators. However, even the most subtle failures may be detected if the test has sufficient length. Some of the requirements and trade-offs to achieve efficient detection are presented.

Contents

• Section 1: 4
• Section 2: 5
• Section 3: 15

Bibliographic information

• Title: Efficiency of compact testing for sequential circuits
• Authors: Stanford University. Stanford Electronics Laboratories. Digital Systems Laboratory, J. Losq
• Publisher: Defense Technical Information Center, 1976
• Length: 36 pages