Chemical-mechanical polishing 2001: advantages and future challenges : symposium held April 18-20, 2001, San Francisco, California, U.S.A.
With copper and barrier-layer integration firmly in place, several other exciting developments are occurring in the practice of chemical-mechanical polishing (CMP), and many of the recent advances are described in this volume. Discussions on CMP for shallow-trench isolation, abrasive-free slurries, improvements in pad and tool configurations including fixed abrasive pads, "engineered" particles, effects of nanotopography, end-point studies, defect characterization and novel post-CMP cleaning methods are highlighted. Considerable progress has also been reported in modeling the complicated interactions that occur between the wafer surface and the pad and the slurry, whether containing abrasives or abrasive-free, and their influence on dishing and erosion and nonuniformity. These studies have progressed sufficiently to offer valuable insights for process improvements. Yet many challenges, primarily arising from the integration of low-k dielectrics and the introduction of 300mm wafers, remain and will provide a high level of interest for future volumes. Specifically, low-k films pose severe constraints on the "conventional" CMP process and require new approaches. Demands for continued defect minimization and for improvements in uniformity, both WIW and WTW, and dishing and erosion are more pressing with the introduction of 300mm wafers. Finally consumable costs remain high from the end user's point of view and will need to be addressed.
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2001 Materials Research abrasive abrasive particles alumina aluminum anneal area ratio blanket cerium cerium dioxide Chemical Mechanical Polishing Chemical-Mechanical Planarization chemical-mechanical polishing CMP removal rate CMP slurry composite particles copper film corrosion damascene decreased deposition thickness dielectric dishing and erosion effect Electrochem experimental film thickness friction force function H2O2 concentration increase interaction interconnects interface ISBN layer layout low-k material removal Materials Research Society measured metal nanotopography nitride obtained optoacoustic overpolish oxide thickness pad surface parameters particle size pattern density patterned wafers polish rates polishing CMP polishing pad polyurethane post-CMP pressure Proc removal rate resin Semiconductor shallow trench isolation sheet resistance shown in Figure shows silica silica particles silica slurry silicon simulation SiO2 slurry slurry containing solid loading step CMP step height STI CMP structures surface roughness surfactant Symp tantalum Technology topography trench tungsten wafer center wafer surface