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DIGITAL CONTROL ALGORITHMS
PROCESSOR CONTROL SOFTWARE
2 other sections not shown
accelerometer algorithm of Figure application software arbitration bandwidth requirements busy waiting chapter common bus architecture common bus system common data common memory computer system Concurrent Execution Control Software Structure criteria DATA COMPUTER data references decompose devices digital control algorithms effective throughput efficient enter the kernel failure-effect characteristics fault tolerance functions gyros hardware resources implement individual processor inertial navigation systems inertial reference frame instruction prefetching instruction references interrupt Kalman filtering kernel references low cost memory unit minicomputers modularity multi-microprocessor system multiprocessor system needed newer microprocessors number of processors occurs Pipeline Multiprocessor Architecture pipeline system processor module processor system program memory Read Only Memory real-time computation real-time control applications redundancy management reliability rotation section 3.2 shown in Figure significantly reduces Software resources Standard Common Bus Strapdown Navigation System strapdown system synchronization system of section task task's virtual processor test-and-set Total System Throughput Typical values vehicle wait watchdog timers worst worst-case throughput