Designing Digital Computer Systems with Verilog

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Cambridge University Press, 2005 - Computers - 160 pages
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This book describes how to specify, design, and test a complete digital system using Verilog, a leading commercial hardware description language. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. This ISA is used throughout the remainder of the book to demonstrate how both behavioral and structural models can be developed and intermingled in Verilog. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practicing engineers.

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About the author (2005)

DAVID LILJA received his PhD in Electrical Engineering from the University of Illinois at Urbana-Champaign. He is currently a Professor of Electrical and Computer Engineering , and a Fellow of the Minnesota Supercomputing Institute, at the University of Minnesota in Minneapolis. He also serves as a member of the graduate faculties in Computer Science and Scientific Computation, and was the founding Director of Graduate Studies for Computer Engineering. He has served on the program committees of numerous conferences and as associate editor for IEEE Transactions on Computers. David is a Senior member of the IEEE and a member of the ACM.

SACHIN SAPATNEKAR received his PhD from the University of Illinois at Urbana-Champaign. Currently, he is the Robert and Marjorie Henle Professor in the Department of Electrical and Computer Engineering at the University of Minnesota, and serves on the graduate faculty in Computer Science and Engineering. He has served as Associate Editor for several IEEE journals, a distinguished visitor for the IEEE Computer Society and a distinguished lecturer for the IEEE Circuits and Systems Society. He is a recipient of the NSF Career Award and the SRC Technical Excellence Award. He is a Fellow of the IEEE and a member of the ACM.