1998 Fourth International Symposium on High-Performance Computer Architecture: Proceedings, Las Vegas, Nevada, February 1-4, 1998

Front Cover
Novel memory architecture; routing and networking; ILP and branch handling; efficient communications; memory systems; communications-efficient cache architectures; high-performance processors; and shared-memory multiprocessors are some of the topics discussed in this text.

From inside the book

What people are saying - Write a review

We haven't found any reviews in the usual places.


Josep Torrellas University of Illinois
Control Speculation in Multithreaded Processors through Dynamic Loop Detection
Performance Study of a Concurrent Multithreaded Processor

24 other sections not shown

Common terms and phrases

Bibliographic information