1998 Fourth International Symposium on High-Performance Computer Architecture: Proceedings, Las Vegas, Nevada, February 1-4, 1998

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Novel memory architecture; routing and networking; ILP and branch handling; efficient communications; memory systems; communications-efficient cache architectures; high-performance processors; and shared-memory multiprocessors are some of the topics discussed in this text.

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Contents

Josep Torrellas University of Illinois
2
Control Speculation in Multithreaded Processors through Dynamic Loop Detection
14
Performance Study of a Concurrent Multithreaded Processor
24
Copyright

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