2nd Workshop on Libraries, Component Modeling, and Quality Assurance

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Universidad de Cantabria
Ed. Universidad de Cantabria, 1997 - Computers - 330 pages
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Contents

Design environments supporting reusability
9
a methodology and implementation
31
A Allara A Balboni M Bombana M Mastretti Italtel Italy J Riesco Prieto P Plaza
47
A Testing Methodology for VHDL Based HighLevel Designs
63
Reuse of Algorithmic Hardware Models with Behavioural Synthesis
83
Using VHDL Neural Network Models for Automatic Test Generation
105
Project CIREP Component Information REPresentation
129
Electronic Administration and Management of Intellectual Property Rights in the Electronic Commerce
151
Reports on design and modeling experience
193
A Decimation Filter Synthesizable Macro in VHDL
209
Value Trace VHDL Blocks and Their Application in High Level Synthesis
225
Libraries of Abstract Verified Hardware Modules
245
Electronic component information exchange project
267
Independent advanced delay and power calculation standard
287
Experiences with VITAL Code Generator Controlled by a Nonmonotonic Inference Engine
309
Copyright

Formal methods and tools
171

Common terms and phrases

Bibliographic information