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Simple combinative elements
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0-state transition 1-state to 0-state 3-state outputs address dependency affecting I/O affecting input affecting output arithmetic logic unit array astable element bi-directional binary logic element bistable buffer chapter circuit diagram code converter coder common control block complex devices complex element counter/divider data input data sheets delay element demultiplexer dependency is denoted dependency numbers dynamic input employed enable EXCLUSIVE-OR external figure depicts gate H-level high impedance identifying number IEC standard input label input lines input on pin input or output inputs and outputs internal 1-state internal logic internal number International Electrotechnical Commission logic 1-state logic functions logic levels logic symbology logic symbols memory mode dependency monostable multiplexer negation symbol Note number of inputs octal open-circuit output label output stands parallel loading positive logic convention provides pulse qualifying symbol read only memory relationship represented Schmitt trigger separate shift register shown in Figure signal flow signal lines signifies specifies truth table