Advanced Computer Architectures
Despite the tremendous advances in performance enabled by modern architectures, there are always new applications and demands arising that require ever-increasing capabilities. Keeping up with these demands requires a deep-seated understanding of contemporary architectures in concert with a fundamental understanding of basic principles that allows one to anticipate what will be possible over the system's lifetime. Advanced Computer Architectures focuses on the design of high performance supercomputers with balanced coverage of the hardware, software structures, and application characteristics.
This book is a timeless distillation of underlying principles punctuated by real-world implementations in popular current and past commercially available systems. It briefly reviews the basics of uniprocessor architecture before outlining the most popular processing paradigms, performance evaluation, and cost factor considerations. This builds to a discussion of pipeline design and vector processors, data parallel architectures, and multiprocessor systems. Rounding out the book, the final chapter explores some important current and emerging trends such as Dataflow, Grid, biology-inspired, and optical computing. More than 220 figures, tables, and equations illustrate the concepts presented.
Based on the author's more than thirty years of teaching and research, Advanced Computer Architectures endows you with the tools necessary to reach the limits of existing technology, and ultimately, to break them.
algorithm application architectures arithmetic array bandwidth benchmarks bits branch buffer cache cessors Chapter chip communication complete computer system connected Connection machine control unit cost Cray Cray X-MP crossbar dataflow dataflow languages destination DNA computing efficient elements endfor example execution fetch floating-point front-end functional units grid grid computing hardware hypercube ILLIAC-IV implementation input instruction set integer interconnection network interface Itanium large number latency load loop machine main memory matrix memory access memory blocks memory modules MIMD MIMD systems MIPS mode multiple multiprocessor needed neurons node number of nodes number of processors operands optical output overhead parallel computer path perfect shuffle performance pipeline problem processing provides queue registers routing scalable scalar sequence sequential shown in Figure SIMD simultaneously SISD speed speedup stage storage structure subtasks switch synchronization task throughput topologies utilize vector processor