Advanced Metallization Conference 2002 (AMC 2002):
B. M. Melnick, T. S. Cale, S. Zaima, T. Ohta
Materials Research Society, Jan 1, 2003 - Technology & Engineering - 882 pages
Leading-edge metallization schemes inherently involve the introduction of novel metal systems and novel dielectric materials. Technological advances highlighted during AMC 2002 include the latest developments in integrating copper-based metallization with low-dielectric constant materials and in evaluating the reliability of such interconnects. For the second consecutive year, the volume takes a special look at the status of vertical integration, or 3D chips, and the promise it holds for high-density functional integration and heterogeneous integration. Technical leaders from around the world come together in this volume, the 18th in a popular series from the Materials Research Society, to offers a comprehensive overview of the current state of advanced metallization science and technologies. Topics include: advanced interconnects, 3D integration and packaging; CMP; reliability, test and characterization; metallization; integration; low-k/dielectric materials and characterization; atomic layer deposition (ALD) and barriers.
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Trends and OpportunitiesAn Overview
Interconnect Issues for Integrated MEMS Technology
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adhesion Advanced Metallization annealing applied aspect ratio atomic Atomic Layer Deposition barrier layer barrier metal bonding bottom capacitance capacitors chemical chip concentration copper current density decrease delamination device dielectric constant diffusion barrier distribution dual damascene effect electrical Electrochem electromigration electron etch experimental failure Figure films deposited grain boundaries IEEE integration Interconnect Technology interface investigated leakage current lifetime line width low-k measured mechanical metal line microstructure MOCVD nitride nucleation observed oxide parameters pattern plasma plasma treatment plating polishing polymer pore porosity porous precursor Proc properties reaction reduced reliability samples seed layer Semiconductor sheet resistance shown in Fig shows SiCOH sidewall silicon SiLK film simulation SiOC slurry sputtering stack step coverage stress substrate surface temperature test structures thermal thin films trench vias void voltage wafer wire wire bonding Young's modulus