Advanced Digital Logic Design: Using Verilog, State Machines, and Synthesis for FPGAs
This textbook is intended to serve as a practical guide for the design of complex digital logic circuits such as digital control circuits, network interface circuits, pipelined arithmetic units, and RISC microprocessors. It is an advanced digital logic design textbook that emphasizes the use of synthesizable Verilog code and provides numerous fully worked-out practical design examples including a Universal Serial Bus interface, a pipelined multiply-accumulate unit, and a pipelined microprocessor for the ARM THUMB architecture.
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Condensed Overview of Introductory Digital Logic Design
Digital Logic Design Using Hardware Description Languages
Introduction to Verilog and Test Benches
17 other sections not shown
2's complement active-low adder algorithm assignment statements begin ID_opcode behavioral binary block carry-lookahead chip clock cycle clock signal combinational logic configuration connected control logic datapath default define device diagram digital logic digital logic circuits digital logic design Dp_rec encoding endcase endmodule EPROM error_count errors example execution finite state machine flip-flops FPGA function hardware description language HDL code I'PERIODl Dp ID_Rd ID_Rm_Rs implemented initial instruction instruction pipeline integer interface K-map latch logic equations logic gates loop machine memory method microprocessor mode Moore machine multiplier NAND gate NRZI operation output pipeline registers posedge clk pseudocode recoding reset reset_n result ripple-carry adder RTL program sequence sequential circuit shown in Figure simulation stored subcircuit subtraction Sunggu Lee synthesis tool target circuit test bench test vectors THUMB transition variables Verilog code wire Xilinx