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The Evolution of Static DataFlow Architecture
An UltraMultiprocessing Architecture
Design of a High Performance
18 other sections not shown
activation frame actor algorithm allocated application array Arvind AsiC assignment block buffer cache circular pipeline clock communication compiler Computer Architecture Computer Science concurrent context switch control-flow conveyor CSIRAC cycle data structures data-driven data-flow architecture data-flow computer data-flow graph data-flow machine data-flow model data-flow program datarol distributed dynamic efficient Emap Epsilon-2 evaluation example execution fetch FIFO firing floating point flow Fortran functional language functional program Gaudiot hardware I-structure IEEE implementation input integer iterative instructions latency load matching unit matrix multiplication memory module multilevel model multiprocessor Neumann node opcode operand operations optimal output overhead packet parallel computation Parallel Processing partitioning performance pointer processing element processor recursion result RISC scheduling scheme sequential shown in figure SIGMA-1 signal simulation SISAL static data-flow storage stream strongly connected subgraph switch synchronization tagged-token Technical Report token queue variable vector VLSI