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DESCRIPTION OF AN ITERATIVELY STRUCTURED COMPUTER
The ait2 and ait3 Commands
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1-active cell activity digit activity qualification activity setting ACTIVITY(N addend addition table aq+1i+ri arithmetic BBBBBBBB BBBBBBBB BBBBBBBB blank branch instruction buses capacitance cell in logical cell q central processing unit chapter command common bus common complex symbol common symbol bus complex symbol bus data and instruction data cell data string digital computer distributed logic execution expressions field effect transistors flag general-purpose digital computer input instruction input tape input-output instruction activity qualifier instruction cell containing instruction qualification instruction sequence instruction string integrated circuit intercell issued iteratively structured computer iteratively structured machine left input li+ri loading logical state wg modified n-tuple non-zero activity null symbol operation output instruction preceeding problem procedure-oriented Propagate Right sequential machines shown in Figure significant digit source language STATE(N stored activity stored complex symbol stored symbol string of instructions substrate SYMBOL(N synchronous tape unit terminated tQ bus transmission line unconditional branch