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Modeling Speedup n Greater Than n
Measuring Parallelism in ComputationIntensive ScientificEngineering Applications
Limits of InstructionLevel Parallelism
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algorithm alias analysis applications array bandwidth basic block benchmarks bits branch prediction buffer cache cell chip clock cycle clock period compiler Computer Architecture concurrent Conf Connection Machine data dependencies dataflow dynamic example execution exploit fetch Figure floating point floating-point Fortran functional units global graph hardware hypercube IEEE Trans implementation input instruction format instruction stream instruction-level parallelism integer interconnection issue iterations latch latency load logic loop massively parallel matrix memory access memory modules MIMD multicomputers multiple multiprocessor nodes number of processors operand optimal output overhead packet parallel computers parallel machine Parallel Processing PE's performance prefetch problem Proc queue register file reservation stations scalar sequence sequential shared memory SIMD simulation single software pipelining speedup statements Supercomputing superpipelined superscalar switch synchronization task techniques tion trace scheduling unrolling variable vector VLIW Warp