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Introduction and Overview
Processors GA2270019 page 32 Figure
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370 architecture Access Method address space application program auxiliary storage block multiplexer channel buffer byte multiplexer called channel adapter CHANNEL COMMAND WORD channel program communications controller configuration contains Control Register control unit data address data transfer disk drive double word dynamic address translation error fetching format frame functions hardware I/O instruction I/O interruption I/O operation implementation indicated initial interface interruption handler main storage microcode mode module multiprocessing native mode operand operating system page table perform processor cycle processor storage program execution queue read/write head real address real storage locations record rotational delay rotational position sensing scanner SDLC SEARCH ID segment table SELECTOR sequence specified Status Word storage control storage operations storage protection stored subchannel switching synchronization terminal tion track transfers data Translation Lookaside Buffer Type unit and device virtual address virtual storage VSAM VTAM