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DESCRIPTION OF COMPUTER SYSTEMS
The Building Blocks and Their Interactions
POWERFUL CENTRAL PROCESSORS
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2's complement adder algorithm architecture arithmetic assume bits block buffer Burroughs B1700 bytes cache channel Chapter chip control unit D-unit decoding digits disk drum effective address example execution exponent fetch FIFO floating-point format function hardware high-level language I/O devices IBM System/370 ILLIAC ILLIAC IV implemented index register input instruction set integer interface interleaving interrupt lines loaded logical look-ahead machine mantissa mapping memory modules microinstruction microprocessors microprogram MIMD minicomputers minor cycle mode MULTICS multiplexor multiplier notation opcode operand operating system optimal organization output page fault parallel PE's perform pipeline priority procedure processors queue reference request result scheduling scheme Section segment sequence shift shown in Figure SIMD single stack STARAN step storage stored structure subtraction switch Table task tion transfer UNIBUS variable vector vector processing virtual memory word