Cryptographic Hardware and Embedded Systems - CHES 2000: Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings

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Springer Science & Business Media, Dec 13, 2000 - Computers - 354 pages
These are the pre-proceedings of CHES 2000, the second workshop on Cryp- graphicHardware andEmbedded Systems. The rst workshop, CHES'99, which was held at WPI in August 1999, was received quite enthusiastically by people in academia and industry who are interested in hardware and software imp- mentations of cryptography. We believe there has been a long-standing need for a workshop series combining theory and practice for integrating strong data - curity into modern communications and e-commerce applications. We are very glad that we had the opportunity to serve this purpose and to create the CHES workshop series. As is evident by the papers in these proceedings, there have been many excellentcontributions.Selectingthepapersforthisyear'sCHESwasnotaneasy task, and we regret that we had to reject several good papers due to the limited availability of time. There were 51 submitted contributions to CHES 2000, of which 25 were selected for presentation. This corresponds to a paper acceptance rate of 49% for this year, which is a decrease from the 64% acceptance rate for CHES'99.Allpaperswerereviewed.Inadditiontothecontributedpresentations, we have invited two speakers. As last year, the focus of the workshop is on all aspects of cryptographic hardware and embedded system design. Of special interest were contributions that describe new methods for e cient hardware implementations and hi- speed software for embedded systems, e.g., smart cards, microprocessors, DSPs, etc. In addition, there were again several very interesting and innovative - pers dealingwith cryptanalysis in practice, rangingfrom side-channel attacks to FPGA-based attack hardware.
 

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Contents

Software Implementation of Elliptic Curve Cryptography over Binary Fields
1
Implementation of Elliptic Curve Cryptographic Coprocessor over GF2m on an FPGA
25
A HighPerformance Reconfigurable EllipticA HighPerformance Reconfigurable Elliptic
41
Fast Implementation of Elliptic Curve Defined over GFpm on CalmRISC with MAC2424 Coprocessor
57
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies
71
Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards
78
Power Analysis Attacks and Algorithmic Approcahes to their Countermeasures for Koblitz Curve Cryptosystems
93
A Timing Attack against RSA with the Chinese Remainder Theorem
109
A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals
216
How to Explain SideChannel Leakage to Your Kids
229
On Boolean and Arithmetic Masking against Differential Power Analysis
231
Using SecondOrder Power Analysis to Attack DPA Resistant Software
238
Differential Power Analysis in the Presence of Hardware Countermeasures
252
Montgomery Multiplier and Squarer in GF2m
264
A Scalable and Unified Multiplier Architecture for Finite Fields GFp and GF2m?
277
Improved Results
293

A Comparative Study of Performance of AES Final Candidates Using FPGAs?
125
A Dynamic FPGA Implementation of the Serpent Block Cipher
141
A 12 Gbps DES EncryptorDecryptor Core in an FPGA
156
A 155 Mbps TripleDES Network Encryptor
164
An Energy Efficient Reconfigurable PublicKey Cryptography Processor Architecture
175
HighSpeed RSA Hardware Based on Barrets Modular Reduction Method?
191
Data Integrity in Hardware for Modular Arithmetic
204
A Survey of Attacks and Defenses
302
Application to A51 Cryptanalysis
318
Authentication and Digital Signatures in a Constrained Environment
328
Efficient Generation of Prime Numbers
340
Author Index
355
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