Cryptographic Hardware and Embedded Systems - CHES 2000: Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings
These are the pre-proceedings of CHES 2000, the second workshop on Cryp- graphicHardware andEmbedded Systems. The rst workshop, CHES'99, which was held at WPI in August 1999, was received quite enthusiastically by people in academia and industry who are interested in hardware and software imp- mentations of cryptography. We believe there has been a long-standing need for a workshop series combining theory and practice for integrating strong data - curity into modern communications and e-commerce applications. We are very glad that we had the opportunity to serve this purpose and to create the CHES workshop series. As is evident by the papers in these proceedings, there have been many excellentcontributions.Selectingthepapersforthisyear'sCHESwasnotaneasy task, and we regret that we had to reject several good papers due to the limited availability of time. There were 51 submitted contributions to CHES 2000, of which 25 were selected for presentation. This corresponds to a paper acceptance rate of 49% for this year, which is a decrease from the 64% acceptance rate for CHES'99.Allpaperswerereviewed.Inadditiontothecontributedpresentations, we have invited two speakers. As last year, the focus of the workshop is on all aspects of cryptographic hardware and embedded system design. Of special interest were contributions that describe new methods for e cient hardware implementations and hi- speed software for embedded systems, e.g., smart cards, microprocessors, DSPs, etc. In addition, there were again several very interesting and innovative - pers dealingwith cryptanalysis in practice, rangingfrom side-channel attacks to FPGA-based attack hardware.
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Software Implementation of Elliptic Curve Cryptography over Binary Fields
Implementation of Elliptic Curve Cryptographic Coprocessor over GF2m on an FPGA
A HighPerformance Reconfigurable EllipticA HighPerformance Reconfigurable Elliptic
Fast Implementation of Elliptic Curve Defined over GFpm on CalmRISC with MAC2424 Coprocessor
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies
Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards
Power Analysis Attacks and Algorithmic Approcahes to their Countermeasures for Koblitz Curve Cryptosystems
A Timing Attack against RSA with the Chinese Remainder Theorem
A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals
How to Explain SideChannel Leakage to Your Kids
On Boolean and Arithmetic Masking against Differential Power Analysis
Using SecondOrder Power Analysis to Attack DPA Resistant Software
Differential Power Analysis in the Presence of Hardware Countermeasures
Montgomery Multiplier and Squarer in GF2m
A Scalable and Unified Multiplier Architecture for Finite Fields GFp and GF2m?
A Comparative Study of Performance of AES Final Candidates Using FPGAs?
A Dynamic FPGA Implementation of the Serpent Block Cipher
A 12 Gbps DES EncryptorDecryptor Core in an FPGA
A 155 Mbps TripleDES Network Encryptor
An Energy Efficient Reconfigurable PublicKey Cryptography Processor Architecture
HighSpeed RSA Hardware Based on Barrets Modular Reduction Method?
Data Integrity in Hardware for Modular Arithmetic
Other editions - View all
Cryptographic Hardware and Embedded Systems - CHES 2000: Second ...
Cetin K. Koc,Christof Paar
Limited preview - 2003
Cryptographic Hardware and Embedded Systems - Ches 2000
Cetin K. Koc,Christof Paar
No preview available - 2014
adder addition Advances in Cryptology applied architecture ASIC binary block cipher bytes calculation capacitor chip circuit clock cycles coefficients coordinates coprocessor countermeasures crypto cryptographic cryptographic core cryptosystems datapath decryption device Differential Power Analysis digit DSRCP efficient elliptic curve encryption equation errors execution exponent finite field finite field arithmetic FPGA function GF(p Hamming weight IEEE input integer inversion key-setup latency Koblitz curve Koç LNCS logic method mod f(x modular exponentiation modular multiplication modular reduction module modulo Montgomery multiplication multiplication algorithm n-bit operands operations optimized output bit performance pipeline point multiplication polynomial power analysis attacks power consumption precomputed processor proposed public key random reconfigurable Rijndael round S-box scalar multiplication secret key sensor Serpent signals smart card software implementations speed Springer-Verlag square standard Step subkey Table techniques throughput tion TNAF Twofish Virtex Xilinx XOR gates