Cryptographic Hardware and Embedded Systems -- CHES 2011: 13th International Workshop, Nara, Japan, September 28 -- October 1, 2011, Proceedings
Bart Preneel, Tsuyoshi Takagi
Springer Science & Business Media, Sep 12, 2011 - Computers - 524 pages
This book constitutes the proceedings of the 13th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2011, held in Nara, Japan, from September 28 until October 1, 2011. The 32 papers presented together with 1 invited talk were carefully reviewed and selected from 119 submissions. The papers are organized in topical sections named: FPGA implementation; AES; elliptic curve cryptosystems; lattices; side channel attacks; fault attacks; lightweight symmetric algorithms, PUFs; public-key cryptosystems; and hash functions.
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addition adversary algorithm applied architecture block cipher blockcipher cells CHES ciphertext circuit clock cycles coefficients collision collision attack computation core countermeasures CRYPTO cryptographic Cryptology DDSLL denote device differential Differential Power Analysis dth-order efficient elliptic curve Elliptic Curve Cryptography encryption equation evaluation fault attacks fault injection faulty ciphertext FPGA glitches hardware implementation hash function Heidelberg 2010 higher-order masking input instruction integer key bytes key schedule lattice leakage lightweight linear LNCS logic LR-PUF Mangard memory method Mifare operands operation output bits pairing parallel parameters performance permutation polynomial Power Analysis Preneel processor proposed public key random latches random numbers reconfigurable reduced registers related-key related-key attacks responses RFID round S-box samples Section sharing side-channel attacks signature smartcard spongent Springer Standaert Table techniques throughput tion variables vector Xilinx