Digital Signal Integrity: Modeling and Simulation with Interconnects and Packages

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Prentice Hall PTR, 2001 - Computers - 535 pages
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  • State-of-the-art techniques for predicting and achieving target performance levels
  • Theory, practice, general signal integrity issues, and leading-edge experimental techniques

Model and simulate high-speed digital systems for maximum performance

Maximizing the performance of digital systems means optimizing their high-speed interconnections. Digital Signal Integrity gives engineers all the theory and practical methods they need to accurately model and simulate those interconnections and predict real-world performance. Whether you're modeling microprocessors, memories, DSPs, or ASICs, these techniques will get you to market faster with greater reliability. Coverage includes:

  • In-depth reviews of inductance, capacitance, resistance, single and multiconductor transmission lines, generalized termination schemes, crosstalk, differential signaling, and other modeling/simulation issues
  • Multiconductor interconnects: packages, sockets, connectors and buses
  • Modal decomposition: understanding the outputs generated by commercial modeling software
  • Layer peeling with time-domain reflectometry: its power and limitations
  • Experimental techniques for characterizing interconnect parasitics

In Digital Signal Integrity, Motorola senior engineer Brian Young presents broad coverage of modeling from data obtained through electromagnetic simulation, transmission line theory, frequency and time-domain modeling, analog circuit simulation, digital signaling, and architecture. Young offers a strong mathematical foundation for every technique, as well as over 100 end-of-chapter problems. If you're stretching the performance envelope, you must be able to rely on your models and simulations. With this book, you can.

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Contents

SIGNAL INTEGRITY
55
SIMULTANEOUS SWITCHING NOISE
129
MULTIPORT CIRCUITS
153
Copyright

13 other sections not shown

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About the author (2001)

BRIAN YOUNG is a Member of the Technical Staff at the Somerset Design Center, Semiconductor Product Sector, Motorola, working on packaging, interconnects, and I/O design for PowerPC microprocessors and the RapidIO Interconnect Architecture. For over seven years he has specialized in simulation, modeling, measurement, and performance studies for high-speed signaling with microprocessors, fast static RAMs, and DSPs. He has served as an Assistant Professor in the Department of Electrical Engineering at Texas A&M University, College Station, and as an adjunct professor in the Department of Electrical Engineering at the University of Texas, Austin. Dr. Young holds a Ph.D from the University of Texas, Austin and holds six patents related to packaging. He has published numerous articles in conferences and journals.

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