Domain-Specific Processors: Systems, Architectures, Modeling, and Simulation

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Shuvra S. Bhattacharyya, Ed F. Deprettere, Jürgen Teich
CRC Press, Nov 11, 2003 - Computers - 280 pages
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Ranging from low-level application and architecture optimizations to high-level modeling and exploration concerns, this authoritative reference compiles essential research on various levels of abstraction appearing in embedded systems and software design. It promotes platform-based design for improved system implementation and modeling and enhanced performance and cost analyses. Domain-Specific Processors relies upon notions of concurrency and parallelism to satisfy performance and cost constraints resulting from increasingly complex applications and architectures and addresses concepts in specification, simulation, and verification in embedded systems and software design.

 

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Contents

1 Automatic VHDL Model Generation of Parameterized FIR Filters
1
2 An LUTBased High Level Synthesis Framework for Reconfigurable Architectures
19
3 Highly Efficient Scalable ParallelPipelined Architectures for Discrete Wavelet Transforms
41
4 Stride Permutation Access in Interleaved Memory Systems
63
5 On Modeling IntraTask Parallelism in TaskLevel Parallel Embedded Systems
85
6 Energy Estimation and Optimization for Piecewise Regular Processor Arrays
107
7 Automatic Synthesis of Efficient Interfaces for Compiled Regular Architectures
127
8 GoalDriven Reconfiguration of Polymorphous Architectures
151
9 Realizations of the Extended Linearization Model
171
10 Communication Services for Networks on Chip
193
11 SingleChip Multiprocessing for Consumer Electronics
215
12 Future Directions of Programmable and Reconfigurable Embedded Processors
235
Index
259
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