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SYSTEM STRUCTURE 2 2
Summary of System Structure for Reconfiguration
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absolute address added address interval registers assigned available list base address base register basic binding bootload bootstrap central processing unit chapter four computer utility configuration control mechanisms control processor switch copy CPU's demand paging dynamic reconfiguration capability example executing Figure hardware design I/O channels idle process Intermodule Communication logical processor logical resources logical storage resource Make_unavailable manual switches memory module modular computer system module available module being removed module configuration table move Multics implementation operating system operator interface matrix partition-system physical modules physical resources PL/I port enable registers primary memory primary storage problem processing module processor number program accessible Project MAC Read_config reconfiguration data base reconfiguration primitives reconfiguration process relay relocation mechanism secondary storage module send register service system Set_config signal address register specific storage allocator storage block storage map subroutine table word thesis updates virtual memory virtual resources wired storage