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H Kopetz Technical University of Vienna
Mobility Reduction Based Scheduling with Allocation Emphasis in Datapath Design
CoDesign with the MCSE Methodology
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algorithm analysis application approach architecture array behaviour block broadcast buffer bytes cache cells circuit communication components Computer configuration constraints CORDIC cost covert channel cycle database dataflow defined described distributed domain Euromicro evaluation example execution fault fault coverage fault tolerance Figure FPGA function global graph hardware IEEE implementation input instruction interaction interface language layer layout logic machine mapping memory method Microprogramming MINIX module multicast node objects operation optimal output packets paper parallel parameters performance Petri Nets problem Proc process migration processor proposed protocol query queue R-tree real-time rectangle represented reuse RISC scheduling security level sequential simulation slices spatial access methods specification speculative execution structure Superscalar synchronization synthesis task techniques tion token transaction transistor transition tree variables VHDL VLSI window system X-Nets Y-span