Economies of Scale in Semiconductor Manufacturing
GRIN Verlag, 2013 - 94 pages
Master's Thesis from the year 2004 in the subject Business economics - Business Management, Corporate Governance, grade: gut, Donau-Universitat Krems, course: MBA Entrepreneurship, language: English, abstract: During my work for semiconductor companies I had the possibility to deeply get in touch with semiconductor industry and with fabrication lines (FAB's) being operated at di erent sizes with di erent product technologies. Especially benchmarking activity with other semiconductor companies and FAB's gave me the possibility to understand the mechanisms behind e ciency of semiconductor fabrication lines. In most of observed cases economies of scale are promised to have a great e ect on production costs, which in general is true. However it happens that, especially when benchmarking di erent FAB's against each other, smaller FAB's are not that costly as estimated. Looking at them with magnifying glasses shows up methods how to achieve economies of scale even for smaller fabrication lines. However to understand the di erence and the real lever for low manufacturing costs intrinsic analysis are necessary. The details of each of these analysis is property of the companies, however within this thesis I generalized the results obtained in the past and removed lots of numbers and facts, without removing the key message. Thus lots of graphs in this gure show numbers, that either have been turned from absolute to relative numbers or falsi ed numbers in order not to include any company critical information. Since understanding semiconductor industry is an intrinsic task, also basic rules of this kind of industry are included inside this thesis. This allows readers from other branches to understand the terminology and to get a good broad picture of thisindustry, at least for the present decade. Since evolution is very fast, certain things will certainly change along the years, however general truths can be applied anytime. The general aim of this thesis is not to dig ve
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accuracy achieve benchmarking Berenberg Bank bottleneck capacity planning capital costs cleanroom complexity contingency factor cost model Dataquest decreasing demand depreciation costs direct capital direct personal diseconomies of scale EBIT economies of scale efficiency End Customer enlisted example expensive FAB speed fabless fabrication lines Figure five tools flow factor gross profit margin high amount IDMs inch FAB increase indirect material inside the FAB integrated circuit invest large FAB’s leads maintenance manufacturing costs manufacturing line Market Segment market windows mask layer material costs maximum utilization mobile phones Multiple Technology FAB’s number of tools personal costs players process engineering process steps purchased raw wafer Samsung scale benefit semiconductor business semiconductor companies semiconductor FAB semiconductor industry semiconductor manufacturing semiconductor products shows single technology FAB single tool small FAB spreadsheets suppliers thesis toolpark tooltypes typical unit processes value chain variability Wafer Fab wafer fabrication wafer manufacturing Worldwide