Embedded Computer Systems: Architectures, Modeling, and Simulation: 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, Proceedings

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Timo D. H?m?l?inen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis
Springer Science & Business Media, Jul 4, 2005 - Computers - 476 pages
The SAMOS workshop is an international gathering of highly quali?ed researchers from academia and industry, sharing in a 3-day lively discussion on the quiet and - spiring northern mountainside of the Mediterranean island of Samos. As a tradition, the workshop features workshop presentations in the morning, while after lunch all kinds of informal discussions and nut-cracking gatherings take place. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved problems and in-depth topical reviews can be unleashed in the sci- ti?c arena. Consequently, the workshop provides the participants with an environment where collaboration rather than competition is fostered. The earlier workshops, SAMOS I–IV (2001–2004), were composed only of invited presentations. Due to increasing expressions of interest in the workshop, the Program Committee of SAMOS V decided to open the workshop for all submissions. As a result the SAMOS workshop gained an immediate popularity; a total of 114 submitted papers were received for evaluation. The papers came from 24 countries and regions: Austria (1), Belgium (2), Brazil (5), Canada (4), China (12), Cyprus (2), Czech Republic (1), Finland (15), France (6), Germany (8), Greece (5), Hong Kong (2), India (2), Iran (1), Korea (24), The Netherlands (7), Pakistan (1), Poland (2), Spain (2), Sweden (2), T- wan (1), Turkey (2), UK (2), and USA (5). We are grateful to all of the authors who submitted papers to the workshop.
 

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Contents

Platform Thinking in Embedded Systems
1
Interprocedural Optimization for Dynamic Hardware Configurations
2
An ApplicationOriented Perspective on Architectures and Design Techniques
12
Reconfigurable Multiple Operation Array
22
Rapid Prototyping for Media Processor Architecture Exploration
32
Design Space Exploration and Mapping
41
Automatic FIR Filter Generation for FPGAs
51
TwoDimensional Fast Cosine Transform for VectorSTA Architectures
62
A Programming Model for an Embedded Media Processing Architecture
251
Automatic ADLBased Assembler Generation for ASIP Programming Support
262
Sandbridge Software Tools
269
A Hardware Accelerator for Controlling Access to MultipleUnit Resources in SafetyTimeCritical Systems
279
Pattern Matching Acceleration for Network Intrusion Detection Systems
289
RealTime Stereo Vision on a Reconfigurable System
299
Application of Very Fast Simulated Reannealing VFSR to Low Power Design
308
Embedded Systems
314

Configurable Computing for HighSecurityHighPerformance Ambient Systems
72
Towards Language Support for Reconfigurable Packet Processing
82
What Are They and Are They Useful?
93
FirstLevel Instruction Cache Design for Reducing Dynamic Energy Consumption
103
A Novel JAVA Processor for Embedded Devices
112
Formal Specification of a Protocol Processor
122
Tuning a Protocol Processor Architecture Towards DSP Operations
132
Observations on PowerEfficiency Trends in Mobile Communication Devices
142
CORDICAugmented Sandbridge Processor for Channel Equalization
152
A Hardware Based Technique for Filtering Access to Branch Logic
162
Exploiting Intrafunction Correlation with the Global History Stack
172
Power Efficient Instruction Caches for Embedded Systems
182
Microarchitecture Performance Estimation by Formula
192
Offline Phase Analysis and Optimization for Multiconfiguration Processors
202
Hardware Cost Estimation for ApplicationSpecific Processor Design
212
Ultra Fast CycleAccurate Compiled Emulation of Inorder Pipelined Architectures
222
Generating Stream Based Code from Plain C
232
Fast RealTime Job Selection with Resource Constraints Under Earliest Deadline First
242
A Radix8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms
324
A Scalable Embedded JPEG2000 Architecture
334
A Routing Paradigm with Novel Resources Estimation and Routability Models for XArchitecture Based Physical Design
344
Benchmarking Mesh and Hierarchical Bus Networks in SystemonChip Context
354
DataDriven Multithreading on a Chip Multiprocessor
364
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets
374
High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks
384
The ODYSSEY ToolSet for SystemLevel Synthesis of ObjectOriented Models
394
Design and Implementation of a WLAN Terminal Using UML 20 Based Design Flow
404
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms
414
DVBDSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context
424
A QueuingBased Approach to Architecture Performance Evaluation with SystemC
434
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications
445
A Case for VisualizationIntegrated SystemLevel Design Space Exploration
455
Mixed VirtualReal Prototypes for Incremental System Design A Proof of Concept
465
Author Index
475
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