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Performance of VHSIC Devices in High Throughput Signal Processing
Very Large Scale Arithmetic
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algorithm allocation applications architecture assigned Boolean chip CITO clause communication compiler complete components concurrent configuration connected cycle data flow database dataflow delay developed device DICOMED dynamic efficient equations Eulerian circuits evaluation example execution fault Figure Fortran function graph hardware ICCG IEEE IEEE Trans image processing implementation input instruction integration interconnection interface iteration Kartashev language Load logic loop machine Mahalanobis Distance matrix memory method MIMD module monitor multiple multiprocessor scheduling multiprocessor system node operand operations optimal output packet parallel computation parallel processing performance Petri pipeline pre-fetch problem Proc processing elements processor queue reconfiguration scheduling sequence sequential simulation solution specification static step storage stored structure subgoals subnetwork supercomputer Supersystems sync synchronization systolic systolic array task throughput tion transition transitive closure units variable vector vector processing VLSI