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A FirstGeneration TMS320 Data Sheet
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A-law accumulator address bus addressing mode barrel shifter CLKIN CLKOUT CMOS companding hardware conditions MIN NOM control register control register bits coprocessor coprocessor port current auxiliary register data bus Data Memory Address data RAM decoder Delay time CLKOUTl Description Words Cycles Digital Signal Processing enabled EPROM external filters framing pulse frequency Harvard architecture I/O port indirect addressing input Instruction After Instruction instruction set INTM label LARP latch loaded master clock microcomputer MPYK multiply NOM MAX UNIT OPCODE output overflow mode PARAMETER TEST CONDITIONS peripheral port address processor program counter program memory Pulse duration recommended operating conditions requirements over recommended reset routine SACH SACL SCLK Section serial port shifter sign-magnitude stack status register stored subroutine system control register TBLR TBLW Texas Instruments TMS320 family transmit register voltage Words Cycles Example X2/CLKIN zero